Low Power SoC Design
نویسنده
چکیده
The design of Low Power Systems-on-Chips (SoC) in very deep submicron technologies becomes a very complex task that has to bridge very high level system description with low-level considerations due to technology defaults and variations and increasing system and circuit complexity. This paper describes the major low-level issues, such as dynamic and static power consumption, temperature, technology variations, interconnect, DFM, reliability and yield, and their impact on high-level design, such as the design of multi-Vdd, fault-tolerant, redundant or adaptive chip architectures. Some very low power System-on-Chip (SoC) will be presented in three domains: wireless sensor networks, vision sensors and mobile TV.
منابع مشابه
Low Power Methodology Manual - for System-on-Chip Design
Low power has developed as an important subject in today's and Kaijian Shi, “Low Power Methodology Manual for System on Chip Design”. Embedded Systems 1 (Politecnico di Milano AA 2014/2015) Kaijian Shi, "Low Power Methodology Manual: For System-on-Chip Design", Springer 2008. approach capturing lowpower design characteristics in earlier design stages. (1) M. Keating et al., Low Power Methodolog...
متن کاملFPGA Implementation of JPEG and JPEG2000-Based Dynamic Partial Reconfiguration on SOC for Remote Sensing Satellite On-Board Processing
This paper presents the design procedure and implementation results of a proposed hardware which performs different satellite Image compressions using FPGA Xilinx board. First, the method is described and then VHDL code is written and synthesized by ISE software of Xilinx Company. The results show that it is easy and useful to design, develop and implement the hardware image compressor using ne...
متن کاملNew Challenges in Verification of Mixed-Signal IP and SoC Design
With the increasing demand in mobile and industry controller applications, a SoC design has more and more mixed-signal contents with the usage of some advanced power management techniques, such as power gating, dynamic voltage and frequency scaling etc. Traditional mixed-signal verification methodology relies on circuit simulation at different abstract levels. At the SoC level, mixed-signal fun...
متن کاملDVCon 2012: 131-II287: Low Power SoC Verification: IP Reuse and Hierarchical Composition using UPF
Power management is a critical feature of today’s SoCs, almost as important as functionality. IEEE 1801TM-2009 UPF enables specification of the intended power management infrastructure for an SoC to enable early verification and to drive implementation. Just as the complexity of an SoC demands a well-structured hierarchical approach to design and verification of its functional specification, th...
متن کاملLOW-POWER SYSTEMS-ON-CHIP Bus encoding architecture for low-power implementation of an AMBA-based SoC platform
Advanced microcontroller bus architecture (AMBA) is rapidly becoming the de facto standard for new system-on-chip (SoC) designs. The bus protocol is complex, making any peripherals that can interface to it valuable intellectual property (IP). This paper presents a lowpower bus encoding architecture which is able to deal with the complex advanced highperformance bus (AHB) protocol within AMBA, w...
متن کامل